PCB circuit board test method IST, can be used to quickly assess the reliability of finished multi-layer board. The test board of the dense through-hole series Daisy Chain in series design, intended to simultaneously test the current through the hole, the resistance will produce high temperature of 150 ℃, after power can return to room temperature, so fast heat Cyclic IST test, available instead of the traditional very time-consuming thermal cycling test <usually takes 168 hours or more. After the test, calculate the test board before the electrical failure <refers to the resistance 値 increased by 10%, the total number of thermal cycling test can tolerate how many times, you can be used as an indicator of the long-term reliability of the through-hole. After the test when the resistance 値 rose up to 10% failure, in fact, from the further micro-chip copper wall can be seen on the micro-fissures. IST can evaluate the electrical properties of copper plated through hole, Shanghai SMT processing can simulate PCB after repeated assembly of the heating curve after the electrical reliability.

In order to evaluate the relationship between the decline of the Z-axis thermal expansion coefficient of the finished board and the long-term reliability of Td, the researchers compared the performance of various substrates. The four selected panels have been pre-screened to determine the range of data being tested and indeed cover the reliability specifications for the majority of the plates on the market today. Table 1 shows the detailed characteristics of the four plates.

First of all, the resin to be tested is matched with the 7628 glass cloth composed of substrate, to determine the CTE value, multilayer often due to different combinations, and have different CTE .

A plate is a conventional FR-4 substrate with a Tg of 175 ° C, while the other Modified A plate has the same properties as A except for a lower Z-axis thermal expansion coefficient. The Z-axis CTE of B product is the same as that of A product, but its Td (350 ℃) is higher than that of Td (310 ℃); C product has a low CTE of Z axis and high Td Z-axis CTE, also known as α-1CTE, Tg also known as α-2CTE.

The test board used for the evaluation was a 0.105 "thick 20-layer board with a through-hole aperture of 0.012". The target thickness of the hole wall copper plating layer is 1.01 mil, and the actual average thickness measured is about 0.7-0.8 mil and the minimum thickness is also 0.6 mil. PCB manufacturing variation is most likely to affect this test in the general sense, so all sample runs are intentionally made the same to minimize process errors. Figure 15 shows the comparison of the number of IST thermal cycles corresponding to the electrical failure of the finishing board. The three colors in the figure represent the non-preheating treatment of the finishing board respectively, and the control cases of preheating 3 times and 6 times at 230 ° C.