Overview

Surface mount component selection and design is a key part of the overall product design, designers in the system structure and detailed design phase of the circuit to determine the electrical properties and functions of components in the SMT design phase should be based on equipment and process of the specific circumstances and overall The design requirements determine the package form and structure of the surface mount component. Surface mount solder joints are both mechanical and electrical connections. A reasonable choice has a decisive impact on increasing PCB design density, manufacturability, testability and reliability. Shanghai chip processing

Surface-mounted components and functional components and there is no difference between plug-in, the difference is that the components of the package. Surface-mount packages must withstand a high milk temperature during soldering. Components and substrates must have a matching coefficient of thermal expansion. These factors in the product design must be fully considered.

Select the appropriate package, its main advantages are: 1) effective PCB area savings; 2) to provide better electrical performance; 3) to protect the internal components from the damp and other environmental effects; Provide good communication links; 5). Help heat dissipation and facilitate the transmission and testing.

Surface-mounted components selection, SMT chip foundry

Surface-mounted components are divided into two categories of active and passive. According to the pin shape is divided into gull wing and "J" type. The following description of the components selected.

Passive components

Passive devices include monolithic ceramic capacitors, tantalum capacitors and thick film resistors, rectangular or cylindrical shape. Cylindrical passive devices called "MELF", easy to roll when using reflow, need to use special pad design, should generally be avoided. Rectangular passive components called "CHIP" chip components, its small size, light weight, good antibacterial impact and shock resistance, low parasitic losses, is widely used in various types of electronic products. In order to obtain good solderability, a nickel-based barrier plating must be chosen.

Active device

Surface mount chip carrier has two categories: ceramic and plastic.

Ceramic chip package has the advantages of: 1) good air tightness, good protection of the internal structure 2) signal path is short, parasitic parameters, noise, delay characteristics significantly improved 3) reduce power consumption. The disadvantage is that the CTE mismatch between the package and the substrate can lead to cracking of the solder joint during soldering because no lead absorbs the stress generated when the solder paste melts. The most commonly used ceramic wafer carrier is a leadless ceramic liner carrier LCCC.

Plastic packaging is widely used in military and civilian products, with good price. The package is divided into: small form-factor transistor SOT; small outline integrated circuit SOIC; plastic leaded chip carrier PLCC; small outline J package; plastic flat package PQFP.

In order to effectively reduce the PCB area, SOIC below the pin count of 20 SOIC, PLCC pin number 20-84, PQFP pin number greater than 84 in the same function and performance of the device.